1. Technical Field
The present invention relates to a method of fabricating a thin layer of a semiconductor device, and more particularly, to a method of fabricating a metal silicate layer using an atomic layer deposition (ALD) technique.
2. Discussion of the Related Art
With growing demand for highly-integrated semiconductor devices, a transistor and a capacitor as component semiconductor elements must be fabricated increasingly small to accommodate the smaller size requirements. The transistor and the capacitor elements typically include dielectrics. Efforts to reduce such dielectrics in both overall size and thickness have led, however, to many difficulties in fabrication.
For example, if a thickness of a gate dielectric layer as one component element of the transistor is formed too thin, there may result a deterioration in the insulation characteristics of the gate dielectric layer. A silicon oxide layer is normally used as a material to form the gate dielectric layer. In the case where a thickness of the silicon oxide layer is reduced to about 15 Å or less, it has been reported that there occurs a rapid increase in leakage current apparently caused by a direct tunneling effect in a gate electrode. As one solution to solve the problem described above, there have been efforts to study the use of high-k dielectrics which have a higher dielectric constant and a lower leakage current than those of the silicon oxide layer even when used in thin dielectric layers.
In recent years, a metal silicate layer, such as a hafnium silicate (HfSiOx) layer, as the high-k dielectrics has been proposed. Such a metal silicate layer typically has an excellent mobility of carriers in comparison with Is other high-k dielectrics when such metal silicate layer is employed in a semiconductor transistor.
The conventional method of fabricating such a metal silicate layer uses physical vapor deposition (PVD) and chemical vapor deposition (CVD). As widely known, the PVD technique has serious limitations because of a poor step coverage and poor interface characteristics with a silicon substrate. The CVD technique also has serious limitations because of the need to use high temperatures to form thin films, and because of limitations in being able to precisely control the thickness of the thin film within a tolerance of several Å. Further, because a composition ratio in a PVD or CVD thin film is difficult to control, the conventional methods of fabricating the metal silicate layer were found not suitable to being employed to fabricate a highly-integrated semiconductor device.
Therefore, an atomic layer deposition (ALD) technique has been studied as an alternative method of fabricating a metal silicate layer having a precise thickness by unit of an atomic layer to overcome the limitations of the CVD and PVD techniques. The ALD technique is a method of supplying source gases in a controlled, ordered sequence, with a discrete pulse type by time-division, rather than supplying source gases concurrently in order to form thin films. The supply of the various gases can be conducted by opening/closing valves provided to respective gas conduits with time variance such that process gases are not mixed, and each source gas can be individually supplied into a reactor according to a predetermined interval of time. When each of the source gases is supplied at a predetermined flow rate with such a time variance, a purge gas is also supplied between time intervals of supplying gases to remove the unreacted source gas remaining in the reactor. The ALD technique has the advantages of providing excellent step coverage and depositing a uniform thin film on a large-sized substrate, and also enabling precise control of the thickness of the thin film by controlling the number of repeated deposition cycles.
A general method of fabricating a metal silicate layer using the ALD technique has been disclosed in U.S. patent application Publication No. 2003-0031793 titled “METHOD FOR DEPOSITING A COATING HAVING A RELATIVELY HIGH DIELECTRIC CONSTANT ONTO A SUBSTRATE” by Cheng, et al., which publication is also incorporated herein by reference.
According to Cheng, et al., an aluminum oxide (Al2O3) layer, a tantalum oxide (Ta2O5) layer, and a hafnium oxide (HfO2) layer as a metal oxide layer, and a zirconium silicate (SiZrO4) layer and a hafnium silicate (HfSiOx) layer as a metal silicate layer, and the like, are formed on a semiconductor substrate. In specific, in Cheng et al. the semiconductor substrate is loaded into a reactor. A first precursor gas is supplied to the overall surface of a suitable substrate and then is purged from the reaction chamber. The first precursor, adsorbed on the overall surface of the substrate, is then oxidized by using an oxide gas such as oxygen, water vapor, dinitrogen monoxide (N20), or the like. These operations are repeatedly performed until a first thin film with a desired thickness is formed on the substrate. A second precursor gas is then supplied to the overall surface of the first thin film deposited on the substrate and then is purged. The second precursor, adsorbed on the overall surface of the first thin film on the substrate, is then oxidized by using an oxide gas such as oxygen, water vapor, dinitrogen monoxide (N2O), or the like. These operations are repeatedly performed until a metal silicate layer with a desired thickness is formed on the first thin film layer.
Another method of fabricating a metal silicate layer has been disclosed in Japanese Patent Publication No. 2003-347298 titled “METHOD OF FABRICATING A SEMICONDUCTOR DEVICE AND AN APPARATUS OF PROCESSING A SUBSTRATE,” which publication is also incorporated herein by reference.
According to Japanese Patent Publication No. 2003-347298, a high-k dielectric including a hafnium silicate (HfSiOx) layer can be fabricated. In specific, a first layer source material gas is supplied to a suitable semiconductor substrate and then is purged from the reaction chamber. A remote-plasma oxidation (RPO) process is then performed to supply oxygen radicals to the first layer source material adsorbed on the substrate. These process steps are repeatedly performed for a determined number of repeated cycles in order to form a first layer of a desired thickness. A second material source gas is then supplied to the surface of the resultant structure, and then the layer surface is processed, i.e., the RPO process for supplying oxygen radicals to the surface is performed. These process steps are repeatedly performed for a determined number of repeated cycles so as to form a thin film of a desired thickness.
When the metal silicate layer is formed by one of the methods disclosed in U.S. patent application Publication No. 2003-0031793 or in Japanese Patent Publication No. 2003-347298, after the metal oxide layer formation process is repeatedly performed for a determined number of repeated cycles, a silicon source gas is supplied to the structure. Generally, such silicon source gas has a chemically stable structure relative to the metal oxide layer. As a result, there are many limitations in these methods of converting the metal oxide layer to the desired metal silicate layer using such silicon source gas. For example, it has been found to be very difficult to convert the metal oxide layer to the metal silicate layer after repeatedly performing the metal oxide layer formation process by about 10 times or more, and thereafter supplying the silicon source gas. Instead of such processing leading to the formation of the desired metal silicate layer, the silicon oxide layer may be separately stacked on the metal oxide layer, or the reaction and/or formation of the silicon oxide layer on the metal oxide layer may not occur at all or only along portions of the surface and not uniformly.